mini-llvm 0.1.0
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mini_llvm::mir Namespace Reference

Classes

class  Add
class  AddI
class  And
class  AndI
class  BasicBlock
class  BasicBlockAnalysis
class  BasicBlockBuilder
class  BasicBlockMerging
class  BasicBlockOperand
class  BasicBlockReordering
class  BasicBlockTransform
class  BinaryOperator
class  BinaryOperatorI
class  Br
class  BranchPredictionAnalysis
class  Cmp
class  CmpBr
class  CmpSet
class  CmpZ
class  CmpZBr
class  CmpZSet
class  CondBr
class  CondSet
class  Constant
class  ConstantVisitor
class  CopyPropagation
class  DeadCodeElimination
class  FAdd
class  FakeUse
class  FBinaryOperator
class  FCmp
class  FCmpSet
class  FCvt
class  FCvtFS
class  FCvtFU
class  FCvtSF
class  FCvtUF
class  FDiv
class  FLoad
class  FMov
class  FMovFI
class  FMovIF
class  FMul
class  FNeg
class  FStore
class  FSub
class  FUnaryOperator
class  Function
class  FunctionAnalysis
class  FunctionOperand
class  FunctionTransform
class  GlobalValue
class  GlobalValueOperand
class  GlobalVar
class  I16ArrayConstant
class  I16Constant
class  I32ArrayConstant
class  I32Constant
class  I64ArrayConstant
class  I64Constant
class  I8ArrayConstant
class  I8Constant
class  Immediate
class  ImmediateOperand
class  Instruction
class  InstructionVisitor
class  IntegerImmediate
class  JumpThreading
class  LA
class  LI
class  LiveVariableAnalysis
class  Load
class  Marker
class  MemoryOperand
class  Module
class  ModuleAnalysis
class  ModuleTransform
class  Mov
class  Mul
class  Neg
class  Not
class  NullOperationElimination
class  Or
class  OrI
class  PhysicalRegister
class  PtrArrayConstant
class  PtrConstant
class  Register
class  RegisterOperand
class  RegisterReuse
class  RISCVCall
class  RISCVConstantPropagation
class  RISCVInstructionVisitor
class  RISCVJALR
class  RISCVPassManager
class  RISCVRegister
class  RISCVRet
class  SDiv
class  SExt
class  SHL
class  SHLI
class  SHRA
class  SHRAI
class  SHRL
class  SHRLI
class  SRem
class  StackFrame
class  StackOffsetEvaluation
class  StackOffsetImmediate
class  StackSlot
class  Store
class  Sub
class  SubI
class  TailDuplication
class  Terminator
class  UDiv
class  UnaryOperator
class  UnreachableBlockElimination
class  URem
class  VirtualRegister
class  Xor
class  XorI
class  ZeroConstant
class  ZeroRegisterReplacement

Enumerations

enum class  Condition
enum class  RegisterClass { kGPR , kFPR }

Functions

std::unordered_set< BasicBlock * > successors (const BasicBlock &B)
std::unordered_set< Register * > use (const BasicBlock &B)
std::unordered_set< Register * > def (const BasicBlock &B)
constexpr const char * specifier (Condition cond)
constexpr Condition inverted (Condition cond)
constexpr const char * specifier (ExtensionMode mode)
constexpr const char * specifier (Precision precision)
MINI_LLVM_EXPORT std::unordered_set< Register * > use (const Instruction &I)
MINI_LLVM_EXPORT std::unordered_set< Register * > def (const Instruction &I)
auto globalVars (Module &M)
auto globalVars (const Module &M)
auto functions (Module &M)
auto functions (const Module &M)
MINI_LLVM_EXPORT GlobalVargetGlobalVarByName (Module &M, std::string_view name)
MINI_LLVM_EXPORT const GlobalVargetGlobalVarByName (const Module &M, std::string_view name)
MINI_LLVM_EXPORT FunctiongetFunctionByName (Module &M, std::string_view name)
MINI_LLVM_EXPORT const FunctiongetFunctionByName (const Module &M, std::string_view name)
MINI_LLVM_EXPORT const std::unordered_set< RISCVRegister * > & riscvRegs ()
MINI_LLVM_EXPORT const std::vector< RISCVRegister * > & riscvIntegerResultRegs ()
MINI_LLVM_EXPORT const std::vector< RISCVRegister * > & riscvIntegerArgRegs ()
MINI_LLVM_EXPORT const std::vector< RISCVRegister * > & riscvFloatingResultRegs ()
MINI_LLVM_EXPORT const std::vector< RISCVRegister * > & riscvFloatingArgRegs ()
MINI_LLVM_EXPORT std::unordered_set< PhysicalRegister * > riscvCallImplicitDsts ()
MINI_LLVM_EXPORT std::unordered_set< PhysicalRegister * > riscvCallImplicitSrcs (int numIntegerArgs, int numFloatingArgs)

Enumeration Type Documentation

◆ Condition

enum class mini_llvm::mir::Condition
strong

◆ RegisterClass

enum class mini_llvm::mir::RegisterClass
strong
Enumerator
kGPR 
kFPR 

Function Documentation

◆ def() [1/2]

std::unordered_set< Register * > mini_llvm::mir::def ( const BasicBlock & B)

◆ def() [2/2]

MINI_LLVM_EXPORT std::unordered_set< Register * > mini_llvm::mir::def ( const Instruction & I)

◆ functions() [1/2]

auto mini_llvm::mir::functions ( const Module & M)
inline

◆ functions() [2/2]

auto mini_llvm::mir::functions ( Module & M)
inline

◆ getFunctionByName() [1/2]

MINI_LLVM_EXPORT const Function * mini_llvm::mir::getFunctionByName ( const Module & M,
std::string_view name )

◆ getFunctionByName() [2/2]

MINI_LLVM_EXPORT Function * mini_llvm::mir::getFunctionByName ( Module & M,
std::string_view name )

◆ getGlobalVarByName() [1/2]

MINI_LLVM_EXPORT const GlobalVar * mini_llvm::mir::getGlobalVarByName ( const Module & M,
std::string_view name )

◆ getGlobalVarByName() [2/2]

MINI_LLVM_EXPORT GlobalVar * mini_llvm::mir::getGlobalVarByName ( Module & M,
std::string_view name )

◆ globalVars() [1/2]

auto mini_llvm::mir::globalVars ( const Module & M)
inline

◆ globalVars() [2/2]

auto mini_llvm::mir::globalVars ( Module & M)
inline

◆ inverted()

Condition mini_llvm::mir::inverted ( Condition cond)
inlineconstexpr

◆ riscvCallImplicitDsts()

MINI_LLVM_EXPORT std::unordered_set< PhysicalRegister * > mini_llvm::mir::riscvCallImplicitDsts ( )

◆ riscvCallImplicitSrcs()

MINI_LLVM_EXPORT std::unordered_set< PhysicalRegister * > mini_llvm::mir::riscvCallImplicitSrcs ( int numIntegerArgs,
int numFloatingArgs )

◆ riscvFloatingArgRegs()

MINI_LLVM_EXPORT const std::vector< RISCVRegister * > & mini_llvm::mir::riscvFloatingArgRegs ( )

◆ riscvFloatingResultRegs()

MINI_LLVM_EXPORT const std::vector< RISCVRegister * > & mini_llvm::mir::riscvFloatingResultRegs ( )

◆ riscvIntegerArgRegs()

MINI_LLVM_EXPORT const std::vector< RISCVRegister * > & mini_llvm::mir::riscvIntegerArgRegs ( )

◆ riscvIntegerResultRegs()

MINI_LLVM_EXPORT const std::vector< RISCVRegister * > & mini_llvm::mir::riscvIntegerResultRegs ( )

◆ riscvRegs()

MINI_LLVM_EXPORT const std::unordered_set< RISCVRegister * > & mini_llvm::mir::riscvRegs ( )

◆ specifier() [1/3]

const char * mini_llvm::mir::specifier ( Condition cond)
inlineconstexpr

◆ specifier() [2/3]

const char * mini_llvm::mir::specifier ( ExtensionMode mode)
inlineconstexpr

◆ specifier() [3/3]

const char * mini_llvm::mir::specifier ( Precision precision)
inlineconstexpr

◆ successors()

std::unordered_set< BasicBlock * > mini_llvm::mir::successors ( const BasicBlock & B)

◆ use() [1/2]

std::unordered_set< Register * > mini_llvm::mir::use ( const BasicBlock & B)

◆ use() [2/2]

MINI_LLVM_EXPORT std::unordered_set< Register * > mini_llvm::mir::use ( const Instruction & I)