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RISCVCall.h
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// SPDX-License-Identifier: MIT
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#pragma once
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#include <memory>
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#include <string>
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#include <unordered_set>
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#include "
mini-llvm/mir/Function.h
"
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#include "
mini-llvm/mir/FunctionOperand.h
"
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#include "
mini-llvm/mir/ImmediateOperand.h
"
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#include "
mini-llvm/mir/Instruction.h
"
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#include "
mini-llvm/mir/InstructionVisitor.h
"
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#include "
mini-llvm/mir/MemoryOperand.h
"
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#include "
mini-llvm/mir/PhysicalRegister.h
"
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#include "
mini-llvm/mir/RegisterOperand.h
"
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#include "
mini-llvm/targets/riscv/mir/RISCVInstructionVisitor.h
"
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#include "
mini-llvm/utils/Compiler.h
"
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namespace
mini_llvm::mir
{
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class
MINI_LLVM_EXPORT
RISCVCall
final :
public
Instruction
{
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public
:
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RISCVCall
(
Function
*
callee
,
int
numIntegerArgs
,
int
numFloatingArgs
)
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: callee_(
callee
), numIntegerArgs_(
numIntegerArgs
), numFloatingArgs_(
numFloatingArgs
) {}
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template
<
typename
Self>
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auto
&
callee
(
this
Self &&self) {
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return
self.callee_;
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}
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int
numIntegerArgs
()
const
{
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return
numIntegerArgs_;
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}
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void
setNumIntegerArgs
(
int
numIntegerArgs
) {
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numIntegerArgs_ =
numIntegerArgs
;
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}
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int
numFloatingArgs
()
const
{
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return
numFloatingArgs_;
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}
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void
setNumFloatingArgs
(
int
numFloatingArgs
) {
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numFloatingArgs_ =
numFloatingArgs
;
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}
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std::unordered_set<const RegisterOperand *>
regOps
()
const override
{
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return
{};
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}
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std::unordered_set<const RegisterOperand *>
dsts
()
const override
{
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return
{};
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}
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std::unordered_set<const RegisterOperand *>
srcs
()
const override
{
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return
{};
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}
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std::unordered_set<const MemoryOperand *>
memOps
()
const override
{
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return
{};
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}
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std::unordered_set<PhysicalRegister *>
implicitDsts
()
const override
;
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std::unordered_set<PhysicalRegister *>
implicitSrcs
()
const override
;
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std::unordered_set<const ImmediateOperand *>
immOps
()
const override
{
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return
{};
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}
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bool
hasSideEffects
()
const override
{
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return
true
;
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}
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void
accept
(
InstructionVisitor
&visitor)
override
{
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static_cast<
RISCVInstructionVisitor
&
>
(visitor).visitRISCVCall(*
this
);
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}
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void
accept
(
InstructionVisitor
&visitor)
const override
{
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static_cast<
RISCVInstructionVisitor
&
>
(visitor).visitRISCVCall(*
this
);
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}
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std::string
format
()
const override
;
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std::unique_ptr<Instruction>
clone
()
const override
{
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return
std::make_unique<RISCVCall>(&*
callee
(),
numIntegerArgs
(),
numFloatingArgs
());
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}
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private
:
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FunctionOperand
callee_;
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int
numIntegerArgs_, numFloatingArgs_;
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};
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}
// namespace mini_llvm::mir
Compiler.h
MINI_LLVM_EXPORT
#define MINI_LLVM_EXPORT
Definition
Compiler.h:17
FunctionOperand.h
ImmediateOperand.h
MemoryOperand.h
PhysicalRegister.h
RISCVInstructionVisitor.h
RegisterOperand.h
mini_llvm::mir::FunctionOperand
Definition
FunctionOperand.h:9
mini_llvm::mir::Function
Definition
Function.h:21
mini_llvm::mir::InstructionVisitor
Definition
InstructionVisitor.h:70
mini_llvm::mir::Instruction::Instruction
Instruction()=default
mini_llvm::mir::RISCVCall::numFloatingArgs
int numFloatingArgs() const
Definition
RISCVCall.h:40
mini_llvm::mir::RISCVCall::accept
void accept(InstructionVisitor &visitor) override
Definition
RISCVCall.h:75
mini_llvm::mir::RISCVCall::implicitSrcs
std::unordered_set< PhysicalRegister * > implicitSrcs() const override
mini_llvm::mir::RISCVCall::callee
auto & callee(this Self &&self)
Definition
RISCVCall.h:28
mini_llvm::mir::RISCVCall::regOps
std::unordered_set< const RegisterOperand * > regOps() const override
Definition
RISCVCall.h:48
mini_llvm::mir::RISCVCall::format
std::string format() const override
mini_llvm::mir::RISCVCall::clone
std::unique_ptr< Instruction > clone() const override
Definition
RISCVCall.h:85
mini_llvm::mir::RISCVCall::accept
void accept(InstructionVisitor &visitor) const override
Definition
RISCVCall.h:79
mini_llvm::mir::RISCVCall::hasSideEffects
bool hasSideEffects() const override
Definition
RISCVCall.h:71
mini_llvm::mir::RISCVCall::numIntegerArgs
int numIntegerArgs() const
Definition
RISCVCall.h:32
mini_llvm::mir::RISCVCall::setNumIntegerArgs
void setNumIntegerArgs(int numIntegerArgs)
Definition
RISCVCall.h:36
mini_llvm::mir::RISCVCall::srcs
std::unordered_set< const RegisterOperand * > srcs() const override
Definition
RISCVCall.h:56
mini_llvm::mir::RISCVCall::setNumFloatingArgs
void setNumFloatingArgs(int numFloatingArgs)
Definition
RISCVCall.h:44
mini_llvm::mir::RISCVCall::immOps
std::unordered_set< const ImmediateOperand * > immOps() const override
Definition
RISCVCall.h:67
mini_llvm::mir::RISCVCall::implicitDsts
std::unordered_set< PhysicalRegister * > implicitDsts() const override
mini_llvm::mir::RISCVCall::dsts
std::unordered_set< const RegisterOperand * > dsts() const override
Definition
RISCVCall.h:52
mini_llvm::mir::RISCVCall::memOps
std::unordered_set< const MemoryOperand * > memOps() const override
Definition
RISCVCall.h:60
mini_llvm::mir::RISCVCall::RISCVCall
RISCVCall(Function *callee, int numIntegerArgs, int numFloatingArgs)
Definition
RISCVCall.h:24
mini_llvm::mir::RISCVInstructionVisitor
Definition
RISCVInstructionVisitor.h:17
Function.h
InstructionVisitor.h
Instruction.h
mini_llvm::mir
Definition
BasicBlock.h:22
include
mini-llvm
targets
riscv
mir
Instruction
RISCVCall.h
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